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1. OVERVIEW
The uPD720210 is a USB 3.0 hub controller that complies with the Universal Serial Bus (USB) Specification
Revision 3.0 and operates at up to 5 Gbps. The device incorporates Renesas’ market proven design
expertise in USB 3.0 interface technologies and market proven USB 2.0 hub core. The device is fully
compatible with all prior versi*** of USB and 100% compatible with Renesas’ industry standard USB 3.0 host
controller. It comes in a ***all 76-pin QFN package and integrates several commonly required external
components, making it ideally suited for applicati*** with limited PCB space. In addition, the mPD720210
incorporates Renesas’ low-power technologies.
1.1 Features
l Compliant with Universal Serial Bus 3.0 Specification Revision 1.0, which is released by USB
Implementers Forum, Inc
- Supports the following speed data rate as follows: Low-speed (1.5Mbps) / Full-speed
(12Mbps) / High-speed (480Mbps) / Super-speed (5Gbps)
- Supports USB3.0 link power management (U0/U1/U2/U3)
- Supports USB2.0 link power management (LPM: L0/L1/L2/L3)
l Configurable downstream port number of 2/3/4
l Supports all VBUS control
- Individual or Global over-current detection
- Individual or Ganged power control
l Supports downstream port status with LED
l Supports USB3.0/2.0 Compound (non-removable) devices by I/O pin configuration
l Supports clock output (24/12MHz) for Compound (non-removal) device on downstream ports
l Support Energy Star for PC peripheral system
l Single 5V Power Supply
- On chip LDO for 3.3v from 5v input and Switching Regulator for 1.05v from 5v input (TBD)
l System clock: 24 MHz Crystal or Oscillator
l Supports USB Battery Charging Specification Revision 1.2 and other portable devices
- DCP mode of BC 1.2
- CDP mode of BC 1.2
- China Mobile Phone Chargers
- EU Mobile Phone Chargers
- Blackberry, Apple
l Supports Optional SPI ROM
- Vendor ID / Product ID / UUID
l ***all Footprint
- ***all and low pin count package with simple pin assignment for PCB layout
- Integration of many peripheral components
- Direct routing of all USB signal traces to connector pins only on the top layer
l Automatic switching between Self/Bus-Powered modes
l Integrated Termination resistors for USB
l Fine PHY Controls for Certification
- Pre-emphasis Control (USB3.0)
- Amplitude Adjustment (USB2.0/3.0)
l Provides SUSPEND Status output

1.USB2.0 主機(jī)控制器
3port uPd720102GC-YEB-A(TQFP 120 pin, 14x14)
5port upd720101GJ-UEN-A(LQFP 144 pin, 20x20)

2.USB2.0 HUB 集線器控制器
4port uPD720114GA-YEU-A(TQFP48 pin ,7×7)

3.USB3.0主機(jī)控制器
2port uPD720200F1-DAK-A(FBGA176 pin ,10×10)
2port uPD720200AF1-DAK-A(FBGA176 pin ,10×10)
4port uPD720201K8-701-BAC-A(QFN68 pin 8×8)
2port uPD720202K8-701-BAA-A(QFN48 pin 7×7)
2port EJ168(LQFP100 pin 14x14)
4port EJ188(QFN88 pin 10x10)
4.PMC SPI Flash

型號(hào)規(guī)格 容量 封裝

PM25LD512C2 512bit SOIC8

PM25LD010C 1M-bit SOIC8

PM25LD020C 2M-bit SOIC8

PM25LD040C 4M-bit SOIC8